전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

H8SX/1663 데이터시트(PDF) 666 Page - Renesas Technology Corp

부품명 H8SX/1663
상세설명  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663 데이터시트(HTML) 666 Page - Renesas Technology Corp

Back Button H8SX/1663 Datasheet HTML 662Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 663Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 664Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 665Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 666Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 667Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 668Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 669Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 670Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 666 / 1158 page
background image
Section 12 8-Bit Timers (TMR)
Rev.1.00 Jun. 07, 2006 Page 614 of 1102
REJ09B0294-0100
12.3.3
Time Constant Register B (TCORB)
TCORB is an 8-bit readable/writable register. TCORB_0 and TCORB_1 comprise a single 16-bit
register so they can be accessed together by a word transfer instruction. TCORB is continually
compared with the value in TCNT. When a match is detected, the corresponding CMFB flag in
TCSR is set to 1. Note however that comparison is disabled during the T2 state of a TCORB write
cycle. The timer output from the TMO pin can be freely controlled by this compare match signal
(compare match B) and the settings of bits OS3 and OS2 in TCSR. TCORB is initialized to H'FF.
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W
7
1
R/W
6
1
R/W
5
1
R/W
4
1
R/W
3
1
R/W
2
1
R/W
1
1
R/W
0
1
R/W
TCORB_0
TCORB_1
Bit
Bit Name
Initial Value
R/W
12.3.4
Timer Control Register (TCR)
TCR selects the TCNT clock source and the condition for clearing TCNT, and enables/disables
interrupt requests.
7
CMIEB
0
R/W
6
CMIEA
0
R/W
5
OVIE
0
R/W
4
CCLR1
0
R/W
3
CCLR0
0
R/W
2
CKS2
0
R/W
1
CKS1
0
R/W
0
CKS0
0
R/W
Bit
Bit Name
Initial Value
R/W
Bit
Bit Name
Initial
Value
R/W
Description
7
CMIEB
0
R/W
Compare Match Interrupt Enable B
Selects whether CMFB interrupt requests (CMIB) are
enabled or disabled when the CMFB flag in TCSR is set
to 1. *
2
0: CMFB interrupt requests (CMIB) are disabled
1: CMFB interrupt requests (CMIB) are enabled



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com