전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

Preview PDF HTML

H8SX/1663 데이터시트(PDF) 731 Page - Renesas Technology Corp

부품명 H8SX/1663
상세설명  Renesas 32-Bit CISC Microcomputer H8SX Family / H8SX/1600 Series
PDF  1158 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

H8SX/1663 데이터시트(HTML) 731 Page - Renesas Technology Corp

Back Button H8SX/1663 Datasheet HTML 727Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 728Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 729Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 730Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 731Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 732Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 733Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 734Page - Renesas Technology Corp H8SX/1663 Datasheet HTML 735Page - Renesas Technology Corp Next Button
Zoom Inzoom in Zoom Outzoom out
 731 / 1158 page
background image
Section 15 Serial Communication Interface (SCI, IrDA, CRC)
Rev.1.00 Jun. 07, 2006 Page 679 of 1102
REJ09B0294-0100
Bit
Bit Name
Initial
Value
R/W
Description
2
TEND
1
R
Transmit End
This bit is set to 1 when no error signal is sent from the
receiving side and the next transmit data is ready to be
transferred to TDR.
[Setting conditions]
• When both the TE and ERS bits in SCR are 0
• When ERS = 0 and TDRE = 1 after a specified time
passed after completion of 1-byte data transfer. The
set timing depends on the register setting as follows:
When GM = 0 and BLK = 0, 2.5 etu after transmission
start
When GM = 0 and BLK = 1, 1.5 etu after transmission
start
When GM = 1 and BLK = 0, 1.0 etu after transmission
start
When GM = 1 and BLK = 1, 1.0 etu after transmission
start
[Clearing conditions]
• When 0 is written to TEND after reading TEND = 1
• When a TXI interrupt request is issued allowing
DMAC or DTC to write the next data to TDR
1
MPB
0
R
Multiprocessor Bit
Not used in smart card interface mode.
0
MPBT
0
R/W
Multiprocessor Bit Transfer
Write 0 to this bit in smart card interface mode.
Note:
*
Only 0 can be written, to clear the flag.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com