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M32C/86 데이터시트(PDF) 358 Page - Renesas Technology Corp

부품명 M32C/86
상세설명  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
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제조업체  RENESAS [Renesas Technology Corp]
홈페이지  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C/86 데이터시트(HTML) 358 Page - Renesas Technology Corp

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Page 335
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23. CAN Module
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BOIM
EPIM
BEIM
(b7 - b3)
CANi Error Interrupt Mask Register (i=0, 1)
Symbol
Address
After Reset(1)
C0EIMKR
021416
XXXX X0002
C1EIMKR
029416
XXXX X0002
RW
Bit Name
Function
Bit
Symbol
Bus-Off Interrupt
Mask Bit
Error-Passive Interrupt
Mask Bit
CAN Bus-Error Interrupt
Mask Bit
Nothing is assigned. When write, set to "0".
When read, its content is indeterminate.
RW
RW
RW
NOTES:
1. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after
reset and supplying the clock to the CAN module.
0: Masks (disables) an interrupt request
1: Enables an interrupt request
0: Masks (disables) an interrupt request
1: Enables an interrupt request
0: Masks (disables) an interrupt request
1: Enables an interrupt request
b7
b6
b5
b4
b3
b2
b1
b0
23.1.13 CANi Error Interrupt Mask Register (CiEIMKR Register) (i=0, 1)
Figure 23.15 C0EIMKR and C1EIMKR Registers
Refer to 23.4 CAN Interrupt for details.
23.1.13.1 BOIM Bit
The BOIM bit determines whether an interrupt request is enabled or disabled when the CAN module is
placed in a bus-off state. When the BOIM bit is set to "1", the bus-off interrupt request is enabled.
23.1.13.2 EPIM Bit
The EPIM bit determines whether an interrupt request is enabled or disabled when the CAN module is
placed in an error passive state. When the EPIM bit is set to "1", the error passive interrupt request is
enabled.
23.1.13.3 BEIM Bit
The BEIM bit determines whether an interrupt request is enabled or disabled when a CAN bus error
occurs. When the BEIM bit is set to "1", the CAN bus error interrupt request is enabled.



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