M32CSLASH86 datasheet(419/505 Pages) RENESAS

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Page 396

25. Flash Memory Version

)

(

ROM Code Protect Control Address(5)

Symbol

Address

Factory Setting

ROMCP

FFFFFF16

FF16(4)

Bit Name

Function

Bit

Symbol

NOTES:

1. When the ROM code protection is active by the ROMCP1 bit setting, the flash memory is protected

against reading or rewriting in parallel I/O mode.

2. Set the bit 5 to bit 0 to "1111112" when the ROMCP1 bit is set to a value other than "112".

If the bit 5 to bit 0 are set to values other than "1111112", the ROM code protection may not become

active by setting the ROMCP1 bit to a value other than "112".

3. To make the ROM code protection inactive, erase a block including the ROMCP address in standard

serial I/O mode or CPU rewrite mode.

4. The ROMCP address is set to "FF16" when a block, including the ROMCP address, is erased.

5. When a value of the ROMCP address is "0016" or "FF16", the ROM code protect function is disabled.

(b5 - b0)

ROMCP1

ROM Code Protect

Level 1 Set Bit(1, 2, 3)

b7 b6

Reserved Bit

Set to "1"

0 0 : ROM code protection active

0 1 : ROM code protection active

1 0 : ROM code protection active

1 1 : ROM code protection inactive

11 1 1

Reset Vector

Watchdog Timer Vector

Address Match Vector

BRK Instruction Vector

Overflow Vector

Undefined Instruction Vector

ID7

ID6

ID5

ID4

ID3

ID2

ID1

NMI Vector

FFFFFF16 to FFFFFC16

FFFFFB16 to FFFFF816

FFFFF716 to FFFFF416

FFFFF316 to FFFFF016

FFFFEF16 to FFFFEC16

FFFFEB16 to FFFFE816

FFFFE716 to FFFFE416

FFFFE316 to FFFFE016

FFFFDF16 to FFFFDC16

4 bytes

Address

Single-Step Vector

DBC Vector

ROMCP

Figure 25.2 ROMCP Address

Figure 25.3 Address for ID Code Stored

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