M32CSLASH86 datasheet(173/505 Pages) RENESAS

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Page 150

15. Timer (Timer A)

)

(

Figure 15.7 TRGSR Register and TCSPR Register

Trigger Select Register

Symbol

Address

After Reset

TRGSR

034316

0016

Bit Name

Function

Bit

Symbol

TA4TGL

TA4TGH

Timer A4 Event/Trigger

Select Bit

TA1TGL

TA1TGH

Timer A1 Event/Trigger

Select Bit

TA2TGL

TA2TGH

Timer A2 Event/Trigger

Select Bit

TA3TGL

TA3TGH

Timer A3 Event/Trigger

Select Bit

NOTES:

1. Overflow or underflow

0 0 : Selects an input to the TA1IN pin

0 1 : Selects the TB2 overflows(1)

1 0 : Selects the TA0 overflows(1)

1 1 : Selects the TA2 overflows(1)

b3 b2

0 0 : Selects an input to the TA2IN pin

0 1 : Selects the TB2 overflows(1)

1 0 : Selects the TA1 overflows(1)

1 1 : Selects the TA3 overflows(1)

b5 b4

0 0 : Selects an input to the TA3IN pin

0 1 : Selects the TB2 overflows(1)

1 0 : Selects the TA2 overflows(1)

1 1 : Selects the TA4 overflows(1)

b7 b6

0 0 : Selects an input to the TA4IN pin

0 1 : Selects the TB2 overflows(1)

1 0 : Selects the TA3 overflows(1)

1 1 : Selects the TA0 overflows(1)

Count Source Prescaler Register

Symbol

Address

After Reset(2)

TCSPR

035F16

0XXX 00002

Bit Name

Function

Bit

Symbol

CST

Operation Enable Bit

0 : Stops a divider

1 : Starts a divider

CNT0

CNT1

CNT2

CNT3

(b6 - b4)

Divide Ratio Select Bit(1)

If setting value is n, f2n is the

main clock, on-chip oscillator or

PLL clock divided by 2n.

Not divided if n=0.

NOTES:

1. Set the CST bit to "0" before the CNT3 to CNT0 bits are rewritten.

2. The TCSPR register maintains values set before reset, even after software reset or watchdog timer

reset has performed.

Reserved Bit

When read,

its content is indeterminate

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