M32CSLASH86 datasheet(319/505 Pages) RENESAS

319 / 505 page

Page 296

22. Intelligent I/O (Communication Function)

)

(

Figure 22.27 G1IRF Register, G0TB and G1TB / G0DR and G1DR Registers

SI/O Special Communication Interrupt Detect Register 1(1,2)

Symbol

Address

After Reset

G1IRF

013E16

0016

Bit Name

Function

Bit

Symbol

NOTES:

1. The G1IRF register is used in special communication mode or HDLC data processing mode. It must

be in a reset state or set to "0016" in clock synchronous serial I/O mode or UART mode.

2. The SRT1R bit in the IIO4IR register is also set to "1" if the BSERR, ABT or IRF0 to IRF3 bit is set to "1".

Reserved Bit

Set to "0"

ABT

BSERR

(b1 - b0)

Arbitration Lost

Detect Flag

Bit Stuffing Error

Detect Flag

0 : Not detected

1 : Detected

0 : Not detected

1 : Detected

IRF0

IRF1

IRF2

Interrupt Cause

Determination

Flag 0

IRF3

Interrupt Cause

Determination

Flag 1

Interrupt Cause

Determination

Flag 2

Interrupt Cause

Determination

Flag 3

0 : The G1DR register (receive data register)

does not match the G1CMP0 register

1 : The G1DR register (receive data register)

matches the G1CMP0 register

0 : The G1DR register (receive data register)

does not match the G1CMP1 register

1 : The G1DR register (receive data register)

matches the G1CMP1 register

0 : The G1DR register (receive data register)

does not match the G1CMP2 register

1 : The G1DR register (receive data register)

matches the G1CMP2 register

0 : The G1DR register (receive data register)

does not match the G1CMP3 register

1 : The G1DR register (receive data register)

matches the G1CMP3 register

Transmit Buffer (Receive Data) Register (i=0,1)

Symbol

Address

After Reset

G0TB, G0DR

00EA16

Indeterminate

G1TB, G1DR

012A16

Indeterminate

Function

Set data to be transmitted.

In HDLC data processing mode, the receive data register is read by

reading the GiTB register. Value is written to the transmit buffer register

by writing it to the GiTB register. In HDLC data processing mode, the

value set in the GiRI register is transferred to the GiDR register.

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