M16CSLASH26 datasheet(207/239 Pages) RENESAS

207 / 239 page

CPU Rewrite Mode (Flash Memory Version)

201

Renesas Technology Corp.

M16C/26 Group

SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER

Under

development

Preliminary Specifications Rev. 0.9

Specifications in this manual are tentative and subject to change.

Table 1.20.2. Definition of each bit in status register

[During programming]

(1) Execute the Clear Status Register command to set the

program status flag to "0".

(2) Re-execute the Program command.

Note 2: If the error still occurs, the block in error cannot be used.

(1) Execute the Clear Status Register command to set the erase

status flag to "0".

(2) Re-execute the Block Erase command.

(3) Until erase error disappears, please retry (1) and (2) at least

3 times.

Note 1: If the error still occurs, the block in error cannot be used.

(1) Execute the Clear Status Register command (5016) to clear

the status register.

(2) Try performing the operation one more time after confirming

that the command is entered correctly.

Read status register

SR4=1/FMR06

and

SR5=1/FMR07?

Command

sequence error

YES

SR5=0?/FMR07?

YES

Block erase error

SR4=0?/FMR06?

YES

Program error

End (block erase, program)

Note: When one of SR5 to SR4 is set to 1, neither program nor block erase commands

are accepted. Execute the clear status register command (5016) before executing

these commands.

(Set an address to even when reading the status register)

Full Status Check

By performing full status check, it is possible to know the execution results of erase and program

operations. Figure 1.20.6 shows a full status check flowchart and the action to be taken when each

error occurs.

Figure 1.20.6. Full status check flowchart and remedial procedure for errors

Each SRD bit

Status name

Definition

“1”

“0”

SR7 (D7)

Write state machine (WSM)

Ready

Busy

SR6 (D6)Reserved

SR5 (D5)

Erase status

Terminated in error

Terminated normally

SR4 (D4)

Program status

Terminated in error

Terminated normally

SR4 (D3)

Program status after program

Terminated in error

Terminated normally

SR2 (D2)Reserved

SR1 (D1)Reserved

SR0 (D0)Reserved

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