3850 datasheet(29/261 Pages) RENESAS

29 / 261 page

1-14

3850/3851 Group User’s Manual

HARDWARE

Fig. 10 Port block diagram (1)

(1) Port P0, P1

Direction

Data bus

Port latch

(2) Port P20

Port XC switch bit

Oscillator

Port P21

Data bus

Port latch

Direction

Port XC switch bit

(3) Port P21

Port XC switch bit

Data bus

Port latch

Direction

Sub-clock generating circuit input

(4) Port P22

Data bus

Port latch

Direction

SDA output

I C-BUS interface enable bit

SDA/SCL pin selection bit

SDA input

(5) Port P23

Data bus

Port latch

Direction

SCL output

I C-BUS interface enable bit

SDA/SCL pin selection bit

SCL input

(6) Port P24

Data bus

Port latch

Direction

SDA output

Serial I/O enable bit

Receive enable bit

I C-BUS interface enable bit

SDA/SCL pin selection bit

SDA input

Serial I/O input

(7) Port P25

Data bus

Port latch

Direction

SCL output

I C bus interface enable bit

SDA/SCL pin selection bit

Serial I/O enable bit

Transmit enable bit

SCL input

Serial I/O output

P-channel output disable bit

(8) Port P26

Data bus

Port latch

Direction

Serial clock output

Serial I/O mode selection bit

Serial I/O enable bit

Serial I/O clock selection bit

External clock input

FUNCTIONAL DESCRIPTION

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