7477 datasheet(91/354 Pages) RENESAS

91 / 354 page

7470/7471/7477/7478 GROUP USER’S MANUAL

1-74

HARDWARE

1.12 Timers

(4) External pulse width measurement mode

The external pulse width measurement mode is used to measure a pulse width (“H” or “L”) input from

the CNTR0 or CNTR1 pin.

The operations in the external pulse width measuring mode are described below.

1 Start of count operation

After the count stop bit is cleared to “0,” a count operation starts. Each time a count source is

input, the contents of the timer are decremented by 1.

Note: Because the count stop bit is “0” immediately after reset release, the count operation is

automatically started after reset release but the count source is not a CNTR pin input.

At this time, the external pulse width measurement mode is not provided.

2 Reload operation

When the timer overflows, the value resulting from decrementing 1 from the contents of the timer

latch is transferred (reloaded) to the timer.

3 External pulse width measurement mode

q The “H” or “L” level of a pulse can be selected as a pulse measuring period by the Edge polarity

selection register.

q The difference between the initial value of the timer and the counter value at a count stop

becomes a measured pulse width.

q A reload operation by reading the count value is not performed automatically. To perform

measurement continuously, re-set the initial value by software.

4 Interrupt operation

2Timer interrupt

When the timer overflows, an interrupt request occurs, so that the interrupt request bit is set to

“1.” The acceptance of interrupt is controlled by the interrupt enable bit of each timer.

2CNTR interrupt

An interrupt request is generated from the edge of the pulse input from the CNTR0 pin or the

CNTR1 pin, so that the interrupt request bit is set to “1.” Interrupt acceptance is controlled by

the interrupt enable bit.

The pulse active edge and the CNTR0/CNTR1 interrupt are selected by the Edge polarity selection

5 Stop of count operation

The count operation terminates at the falling edge (at “H” level pulse width measurement) or the

falling edge (“L” level pulse width measurement) of the CNTR pin input. This operation is also

terminated by setting "1" in the count stop bit by software.

Figure 1.12.6 shows an example of the operation of the external pulse width measurement mode.

7477 데이터시트(PDF) 91 Page - Renesas Technology Corp