3802_M datasheet(39/208 Pages) RENESAS

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1-23

HARDWARE

3802 GROUP USER’S MANUAL

Asynchronous serial I/O (UART) mode

Clock asynchronous serial I/O mode (UART) can be selected by

clearing the serial I/O mode selection bit of the serial I/O control

Eight serial data transfer formats can be selected, and the transfer

formats used by a transmitter and receiver must be identical.

The transmit and receive shift registers each have a buffer, but the

two buffers have the same address in memory. Since the shift reg-

ister cannot be written to or read from directly, transmit data is

written to the transmit buffer, and receive data is read from the re-

ceive buffer.

The transmit buffer can also hold the next data to be transmitted,

and the receive buffer can hold a character while the next charac-

ter is being received.

Fig. 20 Block diagram of UART serial I/O

FUNCTIONAL DESCRIPTION

f(XIN)

1/4

PE FE

1/16

Data bus

Receive buffer

Address 001816

Receive shift register

Receive buffer full flag (RBF)

Receive interrupt request (RI)

Baud rate generator

Frequency division ratio 1/(n+1)

Address 001C16

ST/SP/PA generator

Transmit buffer

Data bus

Transmit shift register

Address 001816

Transmit shift completion flag (TSC)

Transmit buffer empty flag (TBE)

Transmit interrupt request (TI)

Address 001916

STdetector

SP detector

UART control register

Address 001B16

Character length selection bit

Address 001A16

BRG count source selection bit

Transmit interrupt source selection bit

Serial I/O1 synchronous clock selection bit

Clock control circuit

Character length selection bit

7 bits

8 bits

Serial I/O1 control register

P46/SCLK1

Serial I/O1 status register

P44/RXD

P45/TXD

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