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AD5522JSVDZ 데이터시트(PDF) 38 Page - Analog Devices

부품명 AD5522JSVDZ
상세설명  Quad Parametric Measurement Unit with Integrated 16-Bit Level Setting DACs
PDF  60 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD5522JSVDZ 데이터시트(HTML) 38 Page - Analog Devices

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AD5522
Rev. A | Page 38 of 60
CIRCUIT OPERATION
FORCE VOLTAGE (FV) MODE
Most PMU measurements are performed in force voltage/measure
current (FVMI) mode, for example, when the device is used as a
device power supply, or in continuity or leakage testing. In force
voltage (FV) mode, the voltage forced is mapped directly to the
DUT. The measure voltage amplifier completes the loop, giving
negative feedback to the forcing amplifier (see Figure 51).
The forced voltage can be calculated as follows:
Forced Voltage at DUT = VOUT
VOUT = 4.5 × VREF × (DAC_CODE/216) − (3.5 × VREF ×
(OFFSET_DAC_CODE/216)) + DUTGND
where:
VOUT is the voltage of the FIN DAC (see the DAC Levels
section).
DUTGND
MEASVHx
DUT
RSENSE
(UP TO
±80mA)
RSENSE
EXTMEASIHx
FOHx
EXTFOHx
CFFx
FIN
FORCE
AMPLIFIER
EXTMEASILx
INTERNAL RANGE SELECT
(±5µA, ±20µA, ±200µA, ±2mA)
DAC
–
–
–
–
–
–
+
+
+
+
+
+
–
+
×5 or ×10
×1
AGND
MEASURE VOLTAGE AMPLIFIER
MEASOUTx
VMID TO
CENTER
I RANGE
×1 OR
×0.2
4k
Ω
2k
Ω
4k
Ω
Figure 51. Forcing Voltage, Measuring Current



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