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ATC35 Summary

1063CS–CBIC–01/03

Compiled LROM

Megacells

The LROM (Large ROM) compiler allows the system designer to acheive high-density

and low-power applications. Multi-block megacells with total capacity up to 4M-bits can

be generated by the LROM compiler.

Compiled memories are diffusion-programmed ROMs with a synchronous access proto-

col, as is for the ROM. The compiler expects a programming file: lrom<xyz>.prg that

contains the LROM pattern. If the .prg file is not available, a random contents is auto-

matically generated. Unlike the ROM compiler, only buffered outputs can be acheived

using the LROM compiler.

The range of permitted LROM configurations is as follows:

Total size:

64K...4M

Number of words: 2K...512K

Bits per word:

8, 16 or 32

Number of address bits:11...19

The memory is organized in multiple blocks of 64K bits each.

Number of blocks:

1...32

Number of rows per block:

256

Number of columns per block: 256

I/O pins in compiled megacells are the following:

me input: Memory Enable.

add<i> inputs: Address.

do<i> outputs: buffered output data.

vdd and gnd: power and ground supplies.

The following table shows the performances for some LROM configurations. Access

time (t

conditions.

Word Size = 16

Word Depth

16K

32K

64K

128K

Width (mm)

0.979

3.570

1.863

1.863

Height (mm)

0.858

0.539

1.716

3.078

11.37

11.84

12.53

15.19

14.15

14.40

15.30

19.14

Dynamic Power (mW/MHz)

0.26

0.56

0.75

0.90