 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
AT89C5122DS-RDTUM 데이터시트(PDF) 45 Page - ATMEL Corporation |
|
|
|||||||||||||||||||||||||||||
AT89C5122DS-RDTUM 데이터시트(HTML) 45 Page - ATMEL Corporation |
|
|
45 / 208 page  45 AT83R5122, AT8xC5122/23 4202F–SCR–07/2008 Use of PLL Clock When the CPU clock is fed by the PLL, the X2 mode is forbidden. The bit X2 must always remain cleared in CKCON0 register. As the PR1 prescaler is always different from 1/2, the usual X1 mode can not be defined. So it is necessary to define an equiva- lent X1 or X2 mode from equivalent clock circuits, as in previous section. Example: PR1=1/4, PLL feeds the CPU. The CPU works in this case at 24 MHz. This frequency could also be obtained by an equivalent clock circuit where the on-chip oscil- lator would run at 48 MHz in X1 mode or at 24 Mhz in X2 mode. So we can say that in this configuration, the CPU works at 48 MHz / X1 or 24 MHz / X2 (See figures below). As the X2 bit is cleared in CKCON0 register, we have always FCK_IDLE = FCK_PERIPH. 8 MHz CPU frequency 1 MHz 1/8 PR1 Prescaler (Equivalent to) 2 MHz 1/2 External Clock X1 mode selected PERIPH frequency 1 MHz CPU frequency 1 MHz PERIPH frequency 1 MHz (Equivalent to) 1 MHz X2 mode selected CPU frequency 1 MHz PERIPH frequency 1 MHz Crystal External Clock |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
