ML5800DM datasheet(9/25 Pages) MICRO-LINEAR

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ML5800

DS5800-F-04

FINAL DATASHEET

JULY 2006

PAON

O (CMOS)

PA Control Output. Enables the off-chip PA at

the correct times in a Transmit slot. Goes high

when transmit RF is present at TXO; goes low

μs before transmit RF is removed from TXO.

This output has 5mA drivers suitable for

driving pin diode switches directly. It also has

optional interlock logic to disable the PA when

the PLL is out of lock.

VSS

VDD

PAON

FREF

I (Analog)

Input for the 12.288MHz or 6.144MHz

reference frequency. This input is used as the

reference frequency for the PLL and as a

calibration frequency for the on-chip filters. An

AC-coupled sine or square wave source drives

this self-biased input. The reference source

must be accurate to 20 PPM.

VSS

FREF

VCCA

40k

QPO

O (Analog)

Charge Pump Output of the phase detector.

This is connected to the external PLL loop

filter.

VSS

VCCPLL

11 QPO

VTUNE

I (Analog)

VCO Tuning Voltage input from the PLL loop

filter. This pin is very sensitive to noise

coupling and leakage currents.

VSS

VCCB

3.7k

VTUNE

2.5V

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