13

3669A–DFLASH–07/07

AT25DF321

9.2

Write Disable

The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Reg-

ister to the logical “0” state. With the WEL bit reset, all program, erase, Protect Sector, Unprotect

Sector, and Write Status Register commands will not be executed. The Write Disable command

is also used to exit the Sequential Program Mode. Other conditions can also cause the WEL bit

to be reset; for more details, refer to the WEL bit section of the Status Register description on

page 21.

To issue the Write Disable command, the CS pin must first be asserted and the opcode of 04h

must be clocked into the device. No address bytes need to be clocked into the device, and any

data clocked in after the opcode will be ignored. When the CS pin is deasserted, the WEL bit in

the Status Register will be reset to a logical “0”. The complete opcode must be clocked into the

device before the CS pin is deasserted, and the CS pin must be deasserted on an even byte

boundary (multiples of eight bits); otherwise, the device will abort the operation and the state of

the WEL bit will not change.

Figure 9-2.

Write Disable

9.3

Protect Sector

Every physical sector of the device has a corresponding single-bit Sector Protection Register

that is used to control the software protection of a sector. Upon device power-up or after a

device reset, each Sector Protection Register will default to the logical “1” state indicating that all

sectors are protected and cannot be programmed or erased.

Issuing the Protect Sector command to a particular sector address will set the corresponding

Sector Protection Register to the logical “1” state. The following table outlines the two states of

the Sector Protection Registers.

Before the Protect Sector command can be issued, the Write Enable command must have been

previously issued to set the WEL bit in the Status Register to a logical “1”. To issue the Protect

Sector command, the CS pin must first be asserted and the opcode of 36h must be clocked into

the device followed by three address bytes designating any address within the sector to be

locked. Any additional data clocked into the device will be ignored. When the CS pin is deas-

serted, the Sector Protection Register corresponding to the physical sector addressed by A23-

SCK

CS

SI

SO

MSB

23

1

0

00000100

67

5

4

OPCODE

HIGH-IMPEDANCE

Table 9-1.

Sector Protection Register Values

Value

Sector Protection Status

0

Sector is unprotected and can be programmed and erased.

1

Sector is protected and cannot be programmed or erased. This is the default state.