4

HV832

Functional Block Diagram

Figure 1: Typical Application Circuit/Test Circuit

C

+

_

Vref

Disable

High

Voltage

Level

Trans-

lator

GND

Control

Vsen

Control Logic &

Switch Osc

EL Osc =

Switch Osc

÷ 128

Com

+

_

3.3nF

100V

1

2

3

4

8

6

5

HV832MG

7

Control

GND

Com

330

µH

IN914*

4.7

µF

Logic Input Pulse

* any (equivalent or better) >90V, fast reverse recovery diode

e

c

i

v

e

Dp

m

a

LV

D

D

I

D

D

V

S

C

f

L

E

s

s

e

n

t

h

g

i

r

B

G

M

2

3

8

V

H

L

E

1

L

E

r

o

2

N

O

V

0

.

3

A

m

7

2V

8

7

z

H

0

0

4

m

l

-

t

f

5

.

7

L

E

h

t

o

B

1

L

E

d

n

a

2

N

OA

m

8

3V

0

7m

l

-

t

f

2

.

6