LTC1272-8ACSW datasheet(17/20 Pages) LINER

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LTC1272

1272fb

APPLICATI

I FOR ATIO

Compatibility with the AD7572

Figure 21 shows the simple, single 5V configuration

recommended for new designs with the LTC1272. If an

AD7572 replacement or upgrade is desired, the LTC1272

can be plugged into an AD7572 socket with minor modi-

fications. It can be used as a replacement or to upgrade

with sample-and-hold, single supply operation and re-

duced power consumption.

The LTC1272, while consuming less power overall than

the AD7572, draws more current from the 5V supply (it

draws no power from the –15V supply). Also, a 1

µs

minimum time between conversions must be provided to

allow the sample-and-hold to reacquire the analog input.

Figure 22 shows that if the clock is synchronous with CS

and RD, it is only necessary to short out the 10

Ω series

resistor and reverse the polarity of the 10

µF bypass

capacitor on the VREF pin. The –15V supply is not required

and can be removed, or, because there is no internal

connection to pin 23, it can remain unmodified. The clock

can be considered synchronous with CS and RD in cases

where the LTC1272 CLK IN signal is derived from the same

clock as the microprocessor reading the LTC1272.

10 F

REF

D11 (MSB)

D10

CLK IN

CLK OUT

HBEN

BUSY

LTC1272

DGND

D3/11

D2/10

D1/9

D0/8

AGND

µP

CONTROL

LINES

0.1 F*

8 OR 12-BIT

PARALLEL

BUS

ANALOG INPUT

(0V TO 5V)

µF

0.1

µF

FOR GROUNDING AND BYPASSING HINTS

SEE FIGURE 11 AND APPLICATION HINTS

SECTION

LTC1272 • TA03

2.42V

OUTPUT

REF

Figure 21. Single 5V Supply, 3

µs, 12-Bit Sampling ADC

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