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LTC1654IGN 데이터시트(PDF) 11 Page - Linear Technology

부품명 LTC1654IGN
상세설명  Dual 14-Bit Rail-to-Rail DAC in 16-Lead SSOP Package
PDF  16 Pages
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제조업체  LINER [Linear Technology]
홈페이지  http://www.linear.com
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LTC1654IGN 데이터시트(HTML) 11 Page - Linear Technology

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LTC1654
1654fb
Rail-to-Rail Output Considerations
Rail-to-rail DACs take full advantage of the supply range
available to them, but cannot produce output voltages
above VCC or below ground. See Figure 2a.
If REFLO is tied to GND, the output for the lowest codes
may limit at 0V, as shown in Figure 2b. Similarly, limiting
can occur near full scale if the REFHI pin is tied to VCC, as
shown in Figure 2c.
The offset, gain error and linearity of the LTC1654 are
defined and tested in output ranges that avoid limiting.
The low code kL used in these measurements is defined as
the code which gives a nominal output of 32mV above
ground; see Table 2.
Figure 2. Effects of Rail-to-Rail Operation On a DAC Transfer Curve: (a) Overall Transfer Function, (b) Effect of Negative
Offset for Codes Near Zero Scale, (c) Effect of Positive Full-Scale Error for Input Codes Near Full Scale When VREF = VCC
1654 F02
INPUT CODE
(b)
OUTPUT
VOLTAGE
NEGATIVE
OFFSET
0V
8192
0
16383
INPUT CODE
OUTPUT
VOLTAGE
(a)
VREF = VCC
VREF = VCC
(c)
INPUT CODE
OUTPUT
VOLTAGE
POSITIVE
FSE
APPLICATIO S I FOR ATIO
Table 2. Low Code kL
VREFHI, V
4.096 2.048
1
128
256
1/2
256
512
Note: VREFLO = O



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