| 전자부품 데이터시트 검색엔진 |
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LTC4301CDD 데이터시트(PDF) 4 Page - Linear Technology |
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LTC4301CDD 데이터시트(HTML) 4 Page - Linear Technology |
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4 / 12 page ![]() 4 LTC4301 4301fb PI FU CTIO S CS (Pin 1): The connection sense pin is a 1.4V threshold digital input pin. For normal operation CS is grounded. Driving CS above the 1.4V threshold isolates SDAIN from SDAOUT and SCLIN from SCLOUT and asserts READY low. SCLOUT (Pin 2): Serial Clock Output. Connect this pin to the SCL bus on the card. SCLIN (Pin 3): Serial Clock Input. Connect this pin to SCL on the bus backplane. GND (Pin 4): Ground. Connect this pin to a ground plane for best results. READY (Pin 5): The READY pin is an open drain N-channel MOSFET output which pulls down when CS is high or when the start-up sequence described in the Operation section has not been completed. READY goes high when CS is low and a start-up is complete. SDAIN (Pin 6): Serial Data Input. Connect this pin to the SDA bus on the backplane. SDAOUT (Pin 7): Serial Data Output. Connect this pin to the SDA bus on the card. VCC (Pin 8): Main Input Supply. Place a bypass capacitor of at least 0.01 µF close to VCC for best results. Exposed Pad (Pin 9): Exposed pad may be left open or connected to device ground. BLOCK DIAGRA CONNECT PRECHARGE CONNECT PRECHARGE CONNECT CONNECT 1 R2 200k R1 200k R3 200k R4 200k PRECHARGE LOGIC PRECHARGE CONNECT 95 µs DELAY UVLO 1.4V CS 1.8V 3 SCLIN 6 SDAIN 1.8V CONNECT CONNECT 7 SDAOUT 8 VCC 2 SCLOUT READY 5 GND 4301 BD 4 LTC4301 Supply Independent 2-Wire Bus Buffer |
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