LTC2925

15

2925f

Offset Tracking Example

Converting the circuit in the coincident tracking example

to the offset tracking shown in Figure 15 is relatively simple.

Here the 1.8V slave 1 supply ramps up 1V below the mas-

ter. The ramp rate remains the same (100V/s), so there are

no changes necessary to steps 1 and 2 of the 3-step design

procedure. Only step 3 must be considered. Be sure to

verify that the chosen voltage offsets will allow the slave

supplies to ramp up completely. In this example, if the

voltage offset were 2V, the slave supply would only ramp

up to 3.3V – 2V = 1.3V.

3.

Choose RTA to obtain the desired delay.

using the ramp rate:

t

V

S

V

Vs

ms

D

OS

S

==

=

1

100

10

6

()

APPLICATIO S I FOR ATIO

From Equation 4:

R

Vk

ms

V s

k

TA

″ ==

0 8

16 5

1

100

13 2

.•

.

•

.

From Equation 5:

Rk

k

k

13 1

132

665

.||

.

.

Figure 15. Offset Tracking from Figure 16

MASTER

SLAVE2

SLAVE1

SLAVE3

0.015

Ω

Q1

Si4412ADY

0.1

µF

0.82

µF

10k

3.3V

3.3V

154k

16.5k

88.7k

41.2k

2.5V

SLAVE2

MASTER

88.7k

31.6k

86.6k

31.6k

6.65k

100k

RAMPBUF

TRACK1

TRACK2

TRACK3

FB2

GATE

LTC2925

PGTMR

0.082

µF

SDTMR

0.41

µF

SCTMR

GND

2925 F16

RAMP

100k

1.5V

SLAVE3

86.6k

DC/DC

IN

FB = 0.8V

OUT

DC/DC

IN

FB = 0.8V

RUN/SS

RUN/SS

OUT

FB3

3.3V

PGI

35.7k

1.8V

SLAVE1

16.5k

SUPPLY

MONITOR

DC/DC

IN

FB = 1.235V

RUN/SS

OUT

FB1

FAULT

ON

10k

STATUS

REMOTE

RST

SD3

SD2

SD1

0.1

µF

10

Ω

Figure 16. Offset Tracking Example

10ms/DIV

2925 F15b

10ms/DIV

2925 F15a

1V/DIV

1V/DIV