LTC3561A datasheet(13/20 Pages) LINER

13 / 20 page

LTC3561A

3561af

components and the output capacitor size. Typically, 3 to

4 cycles are required to respond to a load step, but only

in the ﬁrst cycle does the output drop linearly. The output

droop, VDROOP, is usually about 2 to 3 times the linear

drop of the ﬁrst cycle. Thus, a good place to start is with

the output capacitor value of approximately:

OUT ≈ 2.5

ΔI

OUT

O •VDROOP

More capacitance may be required depending on the duty

cycle and load step requirements.

In most applications, the input capacitor is merely required

to supply high frequency bypassing, since the impedance

to the supply is very low. A 10μF ceramic capacitor is

usually enough for these conditions.

Setting the Output Voltage

The LTC3561A develops a 0.8V reference voltage between

the feedback pin, VFB, and the signal ground as shown in

Figure 4. The output voltage is set by a resistive divider

according to the following formula:

OUT ≈ 0.8V 1+

⎛

⎝⎜

⎞

⎠⎟

Keeping the current small (<5μA) in these resistors maxi-

mizes efﬁciency, but making them too small may allow

stray capacitance to cause noise problems and reduce the

phase margin of the error amp loop.

To improve the frequency response, a feed-forward capaci-

tor CF may also be used. Great care should be taken to

route the VFB line away from noise sources, such as the

inductor or the SW line.

Shutdown and Soft-Start

The SHDN/RT pin is a dual purpose pin that sets the oscil-

lator frequency and provides a means to shut down the

LTC3561A. This pin can be interfaced with control logic in

several ways, as shown in Figure 2 and Figure 3. In both

conﬁgurations, Run = “0” shuts down the LTC3561A and

Run = “1” activates the LTC3561A.

By activating the LTC3561A, an internal soft-start slowly

ramps the output voltage up until regulation. Soft-start

prevents surge currents from VIN by gradually ramping

the output voltage up during start-up. The output will ramp

from zero to full scale over a time period of approximately

0.8ms. This prevents the LTC3561A from having to quickly

charge the output capacitor and thus supplying an exces-

sive amount of instantaneous current.

APPLICATIONS INFORMATION

Figure 2. SHDN/RT Pin Activated with a Logic Input

Figure 3. SHDN/RT Pin Activated with a Switch

3561A F02

RUN

SHDN/RT

3561A F03

RUN

SHDN/RT

SVIN

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