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HC331 데이터시트(PDF) 8 Page - Altera Corporation |
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HC331 데이터시트(HTML) 8 Page - Altera Corporation |
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8 / 26 page ![]() 1–6 Chapter 1: DC and Switching Characteristics of HardCopy III Devices Electrical Characteristics HardCopy III Device Handbook, Volume 3 © December 2008 Altera Corporation The accuracy listed in Table 1–6 is valid at the time of calibration. If the voltage or temperature changes, the termination resistance value varies. Table 1–7 lists the resistance tolerance for HardCopy III on-chip termination. Table 1–8 lists OCT variation with temperature and voltage after power-up calibration. Use Table 1–8 and Equation 1–1 to determine OCT variation without re-calibration. 1 Note that R CAL is calibrated on-chip termination at power-up. ΔT and ΔV are variations in temperature and voltage (VCCIO) at power-up. 50−Ω R T 1.5 Internal parallel termination with calibration (50- Ω setting) V CCIO = 1.5 V TBD — % 50−Ω R S 1.2 Internal series termination with calibration (50- Ω setting) V CCIO = 1.2 V TBD — % 50−Ω R T 1.2 Internal parallel termination with calibration (50- Ω setting) V CCIO = 1.2 V TBD — % Notes to Table 1–6: (1) OCT calibration accuracy is valid at the time of calibration only. (2) Pending silicon characterization. Table 1–6. HardCopy III On-Chip Termination Calibration Accuracy Specifications – Preliminary (Part 2 of 2) (Note 1) Symbol Description Conditions Calibration Accuracy Unit Commercial (2) Industrial Table 1–7. On-Chip Termination Resistance Tolerance Specification for I/Os – Preliminary (Note 1) Symbol Description Resistance Tolerance Unit Commercial Max Industrial Max R OCT_UNCAL Internal series termination without calibration TBD — % R OCT_CAL Internal series termination with calibration (2) —% Notes to Table 1–7: (1) Pending silicon characterization. (2) For resistance tolerance after power-up calibration, refer to Table 1–8. Equation 1–1. R OCT R CAL 1 dR dT ------- ΔT dR dV ------- ΔV × + × + ⎝⎠ ⎛⎞ = |
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