SN54HC652, SN74HC652

OCTAL BUS TRANSCEIVERS AND REGISTERS

WITH 3-STATE OUTPUTS

SCLS151B – DECEMBER 1982 – REVISED MAY 1997

6

POST OFFICE BOX 655303

timing requirements over recommended operating free-air temperature range (unless otherwise

noted)

VCC

TA = 25°C

SN54HC652

SN74HC652

UNIT

VCC

MIN

MAX

MIN

MAX

MIN

MAX

UNIT

2 V

0

6

0

4.3

0

5.5

fclock

Clock frequency

4.5 V

0

31

0

22

0

27

MHz

6 V

0

36

0

25

0

31

2 V

80

115

95

tw

Pulse duration, CLKBA or CLKAB high or low

4.5 V

16

23

19

ns

6 V

14

20

16

↑

↑

2 V

100

150

125

tsu

Setup time, A before CLKAB

↑ or B before CLKBA↑

4.5 V

20

30

25

ns

6 V

17

26

21

↑

↑

2 V

5

5

5

th

Hold time, A after CLKAB

↑ or B after CLKBA↑

4.5 V

5

5

5

ns

6 V

5

5

5

(unless otherwise noted) (see Figure 2)

PARAMETER

FROM

TO

VCC

TA = 25°C

SN54HC652

SN74HC652

UNIT

PARAMETER

(INPUT)

(OUTPUT)

VCC

MIN

TYP

MAX

MIN

MAX

MIN

MAX

UNIT

2 V

6

10

4.3

5.5

fmax

4.5 V

31

40

22

27

MHz

6 V

36

45

25

31

2 V

65

180

270

225

CLKBA or CLKAB

A or B

4.5 V

18

36

54

45

6 V

14

31

46

38

2 V

50

135

205

170

tpd

A or B

B or A

4.5 V

14

27

41

34

ns

6 V

11

23

35

29

†

2 V

70

190

285

240

SBA or SAB†

A or B

4.5 V

20

38

57

48

6 V

16

32

48

41

2 V

85

245

370

305

ten

OEBA or OEAB

A or B

4.5 V

25

49

74

61

ns

6 V

20

42

63

52

2 V

50

245

370

305

tdis

OEBA or OEAB

A or B

4.5 V

23

49

74

61

ns

6 V

20

42

63

52

2 V

28

60

90

75

tt

Any

4.5 V

8

12

18

15

ns

6 V

6

10

15

13

† These parameters are measured with the internal output state of the storage register opposite that of the bus input.

PRODUCT PREVIEW information concerns products in the formative or

design phase of development. Characteristic data and other

specifications are design goals. Texas Instruments reserves the right to

change or discontinue these products without notice.