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CDK1308 데이터시트(PDF) 9 Page - Cadeka Microcircuits LLC.

부품명 CDK1308
상세설명  Ultra Low Power, 20/40/65/80MSPS, 10-bit Analog-to-Digital Converters (ADCs)
PDF  14 Pages
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제조업체  CADEKA [Cadeka Microcircuits LLC.]
홈페이지  http://www.cadeka.com
Logo CADEKA - Cadeka Microcircuits LLC.

CDK1308 데이터시트(HTML) 9 Page - Cadeka Microcircuits LLC.

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©2008 CADEKA Microcircuits LLC
www.cadeka.com
9
ADVANCE Data Sheet
Electrical Characteristics - CDK1308D
(AVDD = 1.8V, DVDD = 1.8V, DVDDCLK = 1.8V, OVDD = 2.5V, 80MSPS clock, 50% clock duty cycle,
-1dBFS 8MHz input signal, unless otherwise noted)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
Performance
SNR
Signal to Noise Ratio
FIN = 8MHz
61.6
dBFS
FIN = 20MHz
61.2
dBFS
FIN = 30MHz
61.3
dBFS
FIN ≃ FS/2
61.3
dBFS
SINAD
Signal to Noise and Distortion Ratio
FIN = 8MHz
61.3
dBFS
FIN = 20MHz
60.7
dBFS
FIN = 30MHz
61.0
dBFS
FIN ≃ FS/2
58.7
dBFS
SFDR
Spurious Free Dynamic Range
FIN = 8MHz
74.8
dBc
FIN = 20MHz
73.9
dBc
FIN = 30MHz
74.7
dBc
FIN ≃ FS/2
61.7
dBc
HD2
Second order Harmonic Distortion
FIN = 8MHz
-88.5
dBc
FIN = 20MHz
-95.0
dBc
FIN = 30MHz
-88.9
dBc
FIN ≃ FS/2
-79.0
dBc
HD3
Third order Harmonic Distortion
FIN = 8MHz
-74.8
dBc
FIN = 20MHz
-75.0
dBc
FIN = 30MHz
-74.7
dBc
FIN ≃ FS/2
-61.7
dBc
ENOB
Effective number of Bits
FIN = 8MHz
9.9
bits
FIN = 20MHz
9.8
bits
FIN = 30MHz
9.8
bits
FIN ≃ FS/2
9.5
bits
Power Supply
AIDD
Analog Supply Current
16.5
mA
DIDD
Digital Supply Current
Digital core supply
3.3
mA
OIDD
Output Driver Supply
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT enabled
5.9
mA
2.5V output driver supply, sine wave input,
FIN = 1MHz, CLK_EXT disabled
4.1
mA
Analog Power Dissipation
29.7
mW
Digital Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
16.2
mW
Total Power Dissipation
OVDD = 2.5V, 5pF load on output bits,
FIN = 1MHz, CLK_EXT disabled
45.9
mW
Power Down Dissipation
9.1
μW
Sleep Mode
Power Dissipation, Sleep mode
18.3
mW
Clock Inputs
Max. Conversion Rate
80
MSPS
Min. Conversion Rate
65
MSPS



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