전자부품 데이터시트 검색엔진
  Korean  ▼
ALLDATASHEET.CO.KR

X  

SN74LVTH574 데이터시트(PDF) 3 Page - Texas Instruments

Click here to check the latest version.
부품명 SN74LVTH574
상세설명  3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
PDF  7 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  TI [Texas Instruments]
홈페이지  http://www.ti.com
Logo TI - Texas Instruments

SN74LVTH574 데이터시트(HTML) 3 Page - Texas Instruments

  SN74LVTH574 Datasheet HTML 1Page - Texas Instruments SN74LVTH574 Datasheet HTML 2Page - Texas Instruments SN74LVTH574 Datasheet HTML 3Page - Texas Instruments SN74LVTH574 Datasheet HTML 4Page - Texas Instruments SN74LVTH574 Datasheet HTML 5Page - Texas Instruments SN74LVTH574 Datasheet HTML 6Page - Texas Instruments SN74LVTH574 Datasheet HTML 7Page - Texas Instruments  
Zoom Inzoom in Zoom Outzoom out
 3 / 7 page
background image
SN54LVTH574, SN74LVTH574
3.3-V ABT OCTAL EDGE-TRIGGERED D-TYPE FLIP-FLOPS
WITH 3-STATE OUTPUTS
SCBS688D – MAY 1997 – REVISED APRIL 1999
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, VCC
–0.5 V to 4.6 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1)
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high-impedance
or power-off state, VO (see Note 1)
–0.5 V to 7 V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state, VO (see Note 1)
–0.5 V to VCC + 0.5 V
. . . . . . . . . . . . .
Current into any output in the low state, IO: SN54LVTH574
96 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74LVTH574
128 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the high state, IO (see Note 2): SN54LVTH574
48 mA
. . . . . . . . . . . . . . . . . . . . . . .
SN74LVTH574
64 mA
. . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0)
–50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0)
–50 mA
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance,
θJA (see Note 3): DB package
115
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package
97
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package
128
°C/W
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, Tstg
–65
°C to 150°C
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The package thermal impedance is calculated in accordance with JESD 51.
recommended operating conditions (see Note 4)
SN54LVTH574
SN74LVTH574
UNIT
MIN
MAX
MIN
MAX
UNIT
VCC
Supply voltage
2.7
3.6
2.7
3.6
V
VIH
High-level input voltage
2
2
V
VIL
Low-level input voltage
0.8
0.8
V
VI
Input voltage
5.5
5.5
V
IOH
High-level output current
–24
–32
mA
IOL
Low-level output current
48
64
mA
∆t/∆v
Input transition rise or fall rate
Outputs enabled
10
10
ns/V
∆t/∆VCC
Power-up ramp rate
200
200
µs/V
TA
Operating free-air temperature
–55
125
–40
85
°C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.



Html Pages

1 2 3 4 5 6 7


데이터시트 다운로드

Go To PDF Page


링크 URL



ALLDATASHEET 가 귀하에 도움이 되셨나요?  [ DONATE ] 

Alldatasheet는?   |   광고문의   |   운영자에게 연락하기   |   개인정보취급방침   |   링크 투 데이터시트    |   링크교환   |   제조사별 검색
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com