Excelics

EPA960B

PRELIMINARY DATA SHEET

High Efficiency Heterojunction Power FET

•

+38.5dBm TYPICAL OUTPUT POWER

•

18.5dB TYPICAL POWER GAIN AT 2GHz

•

0.5 X 9600 MICRON RECESSED

“MUSHROOM” GATE

•

•

ADVANCED EPITAXIAL HETEROJUNCTION

PROFILE PROVIDES EXTRA HIGH POWER

EFFICIENCY, AND HIGH RELIABILITY

•

Idss SORTED IN 240mA PER BIN RANGE

SYMBOLS

PARAMETERS/TEST CONDITIONS

MIN

TYP

MAX

UNIT

Output Power at 1dB Compression

f= 2GHz

Vds=8V, Ids=50% Idss

f= 4GHz

37.0

38.5

38.5

dBm

Gain at 1dB Compression

f= 2GHz

Vds=8V, Ids=50% Idss

f= 4GHz

17.0

18.5

13.5

dB

Idss

Saturated Drain Current

Vds=3V, Vgs=0V

1760

2880

3760

mA

Gm

Transconductance

Vds=3V, Vgs=0V

1920

3120

mS

Vp

Pinch-off Voltage

Vds=3V, Ids=28mA

-1.0

-2.5

V

BVgd

Drain Breakdown Voltage Igd=9.6mA

-11

-15

V

BVgs

Source Breakdown Voltage Igs=9.6mA

-7

-14

V

Rth

Thermal Resistance (Au-Sn Eutectic Attach)

5

MAXIMUM RATINGS AT 25

SYMBOLS

PARAMETERS

ABSOLUTE

1

CONTINUOUS

2

Vds

Drain-Source Voltage

12V

8V

Vgs

Gate-Source Voltage

-8V

-3V

Ids

Drain Current

Idss

2.8A

Igsf

Forward Gate Current

480mA

80mA

Pin

Input Power

36dBm

@ 3dB Compression

Tch

Channel Temperature

175

150

Tstg

Storage Temperature

-65/175

-65/150

Pt

Total Power Dissipation

27 W

23 W

Note: 1. Exceeding any of the above ratings may result in permanent damage.

2. Exceeding any of the above ratings may reduce MTTF below design goals.

Excelics Semiconductor, Inc., 2908 Scott Blvd., Santa Clara, CA 95054

Phone: (408) 970-8664 Fax: (408) 970-8998 Web Site: www.excelics.com

Chip Thickness: 50

± 10 microns

(with > 20 microns Gold Plated Heat Sink (PHS) )

All Dimensions In Microns



 



 









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