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AP89021 데이터시트(PDF) 4 Page - Aplus Intergrated Circuits

부품명 AP89021
상세설명  Standard CMOS process
PDF  18 Pages
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제조업체  APLUS [Aplus Intergrated Circuits]
홈페이지  http://www.aplusinc.com.tw
Logo APLUS - Aplus Intergrated Circuits

AP89021 데이터시트(HTML) 4 Page - Aplus Intergrated Circuits

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Integrated Circuits Inc.
aP89021/010
Ver 2.2
May 31, 2007
4
PIN DESCRIPTIONS
S1 ~ S4
Input Trigger Pins:
- S1 to S4 are used to trigger the 12 Voice Groups in both Key and CPU Parallel Trigger Mode.
- In OTP Programming Mode, S1 to S4 are used as program enable pins.
SBT
Input Trigger Pin:
- In Key Trigger Mode, this pin is trigger pin to trigger the playback of Voice Groups one by one
sequentially.
- In CPU Parallel Command Mode, this pin is used as address strobe to latch the input from S1 to
S4 and starts the voice playback.
- In OTP Programming Mode, this pin is used as PGM signal.
VDD
Power Supply Pin.
VSS
Power Ground Pin
VOUT1 and VOUT2
Digital PWM output pins which can drive speaker and buzzer directly for voice playback.
OSC
During voice playback, an external resistor is connected between this pin and the VDD pin to set the
sampling frequency. In OTP Programming Mode, this is the ACLK input signal.
VPP
Connection to VDD is required during voice playback. In OTP Programming Mode, this pin is
connected to a separate 6.5V power supply.
OUT1, OUT2 and OUT3
- In Key Trigger Mode and CPU Parallel Command Mode, these pins are user programmable pins
for the STOP pulse, BUSY and LED signals.
- During OTP programming, OUT1 serves as OEB while OUT2 serves as data IO.
COUT
Analog 8-bit current mode D/A output for voice playback
RST
Chip reset in playback mode or DCLK pin in OTP programming mode.



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