| 전자부품 데이터시트 검색엔진 |
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THS6032 데이터시트(PDF) 21 Page - Texas Instruments |
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THS6032 데이터시트(HTML) 21 Page - Texas Instruments |
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21 / 31 page ![]() THS6032 LOW-POWER ADSL CENTRAL-OFFICE LINE DRIVER SLOS233C – APRIL1999 – REVISED MARCH 2000 21 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 APPLICATION INFORMATION shutdown function (continued) 1 k Ω To Internal Output Node Q2 +IN Pin –IN Pin To Output Drive Circuitry Q1 Q3 Q4 Q5 Q6 +VCC(H) IBIAS–1 IBIAS–2 DGND QS1 IBIAS–S1 IBIAS–S2 QS2 QS3 QS4 Shut–Down Circuitry Active Load Active Load CC(H) –V Figure 44. Simplified THS6032 Input Stages Because the DGND pin voltage is effectively at a noninverting terminal, any signal or voltage fluctuation at this node is amplified by the THS6032. This could possibly cause a noisy output to appear during shutdown operation. Figure 45 shows the frequency response of the THS6032 due to an input signal at the DGND terminal. The maximum DGND voltage signal which the THS6032 will follow linearly during shutdown operation is less than ±4 V. With this dynamic range capability, it is recommended that the DGND pin be as noise-free as possible to ensure proper transmission line termination. Figure 45 –6 –5 –4 –3 –2 –1 0 1 2 3 DGND OUTPUT AMPLITUDE vs FREQUENCY f – Frequency – Hz 100 k 1 M 10 M 100 M VCC(H) = ± 15 V VCC(L) = ± 5 V RL = 25 Ω VSD = +10 V VI = DGND Pin VO(PP) = 0.2 V VO(PP) = 2 V |
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