TLV5639C, TLV5639I

2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG

CONVERTERS WITH INTERNAL REFERENCE AND POWER DOWN

SLAS189 – MARCH 1999

2

POST OFFICE BOX 655303

functional block diagram

Interface

Control

12-Bit

DAC

Holding

Latch

D(0–11)

CS

REG

WE

OUT

Power-On

Reset

x2

12

4-Bit

Control

Latch

4

Powerdown

and Speed

Control

2

Voltage

Bandgap

PGA With

Output Enable

12-Bit

DAC

Register

12

12

REF

AGND

VDD

LDAC

Terminal Functions

TERMINAL

I/O/P

DESCRIPTION

NAME

NO.

I/O/P

DESCRIPTION

AGND

14

P

Ground

CS

18

I

Chip select. Digital input active low, used to enable/disable inputs

D0 – D11

1 – 10,

19, 20

I

Data input

LDAC

16

I

Load DAC. Digital input active low, used to load DAC output

OUT

13

O

DAC analog voltage output

REG

15

I

Register select. Digital input, used to access control register

REF

12

I/O

Analog reference voltage input/output

VDD

11

P

Positive power supply

WE

17

I

Write enable. Digital input active low, used to latch data