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전자부품 데이터시트 검색엔진 |
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전자부품 데이터시트 검색엔진 |
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TMS320F243 데이터시트(PDF) 13 Page - Texas Instruments |
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TMS320F243 데이터시트(HTML) 13 Page - Texas Instruments |
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13 / 116 page  TMS320F243, TMS320F241 DSP CONTROLLERS SPRS064B – DECEMBER 1997 – REVISED FEBRUARY 1999 13 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251–1443 Terminal Functions - ’F243 PGE Package (Continued) NAME 144 QFP TYPE† RESET STATE‡ DESCRIPTION NO. STATE‡ NO CONNECTS DNC 12 Do not connect Reserved for test DNC 97 – – Do not connect. Reserved for test. 1 2 5 7 9 11 NC 13 No internal connection made to this pin NC 13 – – No internal connection made to this pin 132 133 134 136 138 140 † I = input, O = output, Z = high impedance ‡ The reset state indicates the state of the pin at reset. If the pin is an input, indicated by an I, its state is determined by user design. If the pin is an output, its level at reset is indicated. § In silicon revisions 2.0-TMX and 2.1-TMS, this pin is level-sensitive and can cause multiple interrupts when held low. ¶ Data is in output mode when AVIS is enabled. At reset, the device comes up with AVIS mode enabled. The data bus is in output mode while AVIS is enabled. NOTE: Bold, italicized pin names indicate pin function after reset. |
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