November 2006

ASM2P2310A

rev 0.3

2.5-V TO 3.3-V High-Performance Clock Buffer

6 of 11

Notice: The information in this document is subject to change without notice.

Timing Requirements

Over recommended ranges of supply voltage and operating free-air temperature

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

0

200

Clock frequency

0

170

MHz

Switching Characteristics

Over recommended operating free-air temperature range (unless otherwise noted)

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

CLK to Yn

f = 0 MHz to 200 MHz

For circuit load,

see Figure 2.

1.3

2.8

nS

Output skew (Ym to Yn)

100

pS

Pulse skew (see Figure 5)

250

pS

Part-to-part skew

500

pS

Rise time (see Figure 3)

0.7

2

V/nS

Fall time (see Figure 3)

0.7

2

V/nS

Enable setup time,G_high before CLK↓

0.1

nS

Disable setup time, G_low before CLK↓

0.1

nS

Enable hold time, G_high after CLK ↓

0.4

nS

Disable hold time, G_low after CLK ↓

0.4

nS

Symbol

Parameter

Test Conditions

Min

Typ

Max

Unit

CLK to Yn

f = 0MHz to 170MHz

For circuit load,

see Figure 2.

1.5

3.5

nS

Output skew (Ym to Yn)

170

pS

Pulse skew (see Figure 5)

400

pS

Part-to-part skew

600

pS

Rise time (see Figure 3)

0.5

1.4

V/nS

Fall time (see Figure 3)

0.5

1.4

V/nS

Enable setup time,G_high before CLK↓

0.1

nS

Disable setup time, G_low before CLK↓

0.1

nS

Enable hold time, G_high after CLK ↓

0.4

nS

Disable hold time, G_low after CLK ↓

0.4

nS