May 2007

ASM3P623S05/09A/B

rev 0.3

Timing-Safe™ Peak EMI Reduction IC

3 of 15

Notice: The information in this document is subject to change without notice.

Pin Description for ASM3P623S05A/B

Pin #

Pin Name

Description

1

CLKIN

Input reference frequency, 5V-tolerant input

2

CLK1

1

Buffered clock output

3

CLK2

1

Buffered clock output

4

GND

Ground

5

CLK3

1

Buffered clock output

6

3.3V supply

7

CLK4

1

Buffered clock output

8

CLKOUT

1,2

Buffered clock output, internal feedback on this pin

Notes: 1. Weak pull-down on these outputs.

2. This output is driven and has an internal feedback for the PLL.

3. Buffered clock output is Timing-Safe™

Pin Description for ASM3P623S09A/B

Pin #

Pin Name

Description

1

CLKIN

Input reference frequency, 5V tolerant input

2

CLKA1

1

Buffered clock output

3

CLKA2

1

Buffered clock output

4

3.3V supply

5

GND

Ground

6

CLKB1

1

Buffered clock output

7

CLKB2

1

Buffered clock output

8

S2

2

Select Input, bit 2

9

S1

2

Select Input, bit 1

10

CLKB3

1

Buffered clock output

11

CLKB4

1

Buffered clock output

12

GND

Ground

13

3.3V supply

14

CLKA3

1

Buffered clock output

15

CLKA4

1

Buffered clock output

16

CLKOUT

1,3

Buffered output, Internal feedback on this pin

Notes: 1. Weak pull-down on all outputs.

2. Weak pull-up on these Inputs.

3. This output is driven and has an internal feedback for the PLL.