May 2007

ASM3P622S00A/B/J/E/K

rev 0.4

Low Frequency Timing-Safe™ Peak EMI Reduction IC

8 of 16

Notice: The information in this document is subject to change without notice.

Input-Output Skew

Test Circuit

A Typical example of Timing-Safe™ waveform

GND

CLKOUT

LOAD

OUTPUT

0.1uF

+3.3V

0.1uF

+3.3V

One clock cycle

N=1

Input

Timing-Safe™

Output

when spread spectrum is ON

For example,

Input clock12MHz, translates in to

(1/12MHz) * 0.125=10.41nS

Input

CLKOUT with SSOFF

Input

Timing-Safe™ CLKOUT