November 2006

P2010A

rev 0.2

Low Frequency EMI Reduction IC

2 of 8

Notice: The information in this document is subject to change without notice.

Pin Configuration

Pin Description

Pin#

Pin Name

Type

Description

1

XIN/CLK

I

Connect to crystal or externally generated clock signal.

2

XOUT

I

Connect to crystal. No connect if externally generated clock signal is used.

3

FS0

I

Digital logic input used to select Input Frequency Range (see Table 1).

This pin has an internal pull-up resistor.

4

VSS

P

Ground Connection. Connect to system ground.

5

SSON

I

Digital logic input used to enable Spread Spectrum function (Active Low). Spread

Spectrum function enable when low. This pin has an internal pull-low resistor.

6

ModOUT

O

Spread Spectrum Clock Output.

7

SR0

I

Digital logic input used to select Spreading Range (see Table 1).

This pin has an internal pull-up resistor.

8

VDD

P

Connect to +3.3V or +5.0V

Table 1 - Spread Range Selection

FS0

SR0

Spreading Range

Input Frequency

Modulation rate

1

0

+/- 1.50%

10MHz to 20MHz

(Fin/10)*20.83KHz

1

1

+/- 2.50%

10MHz to 20MHz

(Fin/10)*20.83KHz

0

0

+/- 1.25%

20MHz to 35MHz

(Fin/10)*20.83KHz

0

1

+/- 2.00%

20MHz to 35MHz

(Fin/10)*20.83KHz

XOUT

SSON

ModOUT

SR0

1

2

3

4

5

6

7

8

P2040C

XIN/CLK

VSS

VDD

1

2

3

4

5

6

7

8

P2010A

FS0