| 전자부품 데이터시트 검색엔진 |
|
PCF8534AHL/1 데이터시트(PDF) 35 Page - NXP Semiconductors |
|
|
|||||||||||||||||||||||||||||
PCF8534AHL/1 데이터시트(HTML) 35 Page - NXP Semiconductors |
|
35 / 47 page ![]() PCF8534A_5 © NXP B.V. 2009. All rights reserved. Product data sheet Rev. 05 — 6 August 2009 35 of 47 NXP Semiconductors PCF8534A Universal LCD driver for low multiplex rates The contact resistance between the SYNC pins of cascaded devices must be controlled. If the resistance is too high, the device will not be able to synchronize properly. Table 19 shows the maximum contact resistance values. Fig 23. Synchronization of the cascade for various PCF8534A drive modes Table 19. SYNC contact resistance Number of devices Maximum contact resistance 2 6000 Ω 3 to 5 2200 Ω 6 to 10 1200 Ω 11 to 16 700 Ω Tfr = f fr 1 BP0 SYNC BP0 (1/2 bias) SYNC BP0 (1/3 bias) (a) static drive mode. (b) 1:2 multiplex drive mode. (c) 1:3 multiplex drive mode. (d) 1:4 multiplex drive mode. BP0 (1/3 bias) SYNC SYNC BP0 (1/3 bias) mgl755 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |