SPT7610 datasheet(5/10 Pages) CADEKA

부품명	SPT7610

상세설명	6-BIT, 1 GSPS FLASH A/D CONVERTER

PDF	10 Pages

Scroll/Zoom	100%

제조업체	CADEKA [Cadeka Microcircuits LLC.]

홈페이지	http://www.cadeka.com

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5 / 10 page

1/21/02

SPT7610

Figure 1 – Timing Diagram

FIRST

RISING EDGE

POWER

OUTPUT

BANK A

(DA0-6)

OUTPUT

BANK B

(DB0-6)

DRA

CLK IN

DRB

VIN

NDRA

NDRB

TEST

INVALID DATA

ADC (Normal Operation)

TEST MODE

tsu

tdr

tod

tdr

tod

ADC (Normal Operation)

INVALID DATA

Bank A Test Pattern 1:

- Even Bits = Hi

- Odd Bits = Low

Bank B Test Pattern 1:

- Even Bits = Hi

- Odd Bits = Low

Bank A Test Pattern 2:

- Even Bits = Low

- Odd Bits = Hi

Bank B Test Pattern 2:

- Even Bits = Low

- Odd Bits = Hi

LOGIC LOW

Figure 2 – Test Mode Timing Diagram

CLK (1 GHz)

DRA

Data Bank A

DRB

Data Bank B

VIN

N+1

N+2

N+3

N+4

1 nsec

todB

tdrB

tdrA

todA

OutputB Skew

(toskB)

N+1

N+2

DOBDRB Delay

(todrB)

OutputA Skew

(toskA)

DOADRA Delay

(todrA)

N+5

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