| 전자부품 데이터시트 검색엔진 |
|
EPF8048G 데이터시트(PDF) 2 Page - PCA ELECTRONICS INC. |
|
|
|||||||||||||||||||||||||||||
EPF8048G 데이터시트(HTML) 2 Page - PCA ELECTRONICS INC. |
|
2 / 2 page ![]() CSF8048Gb Rev. 1 1/7/97 100 Base-X Interface Module The circuit below is a guideline for interconnecting PCA’s EPF8048G with ML6692 or ML6694 chip applications. Further details can be obtained from the chip manufacturer application notes. Typical insertion loss of the isolation transformer is 0.5dB. This parameter covers the entire spectrum of the encoded signals in 100 BX protocol. Under terminated conditions, to transmit a 2V pk-pk signal across the cable, you must adjust the chips supporting resistor to get at least 2.12V pk-pk across the transmit pins. Note that in the 100 BX application, you do not need a split primary. The reason is that there is no 10 Base T to negotiate. The receiver side can be terminated as shown or by a single 100 ohms with primary center tap taken to ground via a suitible cap.Note that in the 100 BX application, you do not need a split primary. The reason is that there is no 10 Base-T to negotiate. The receiver side can be terminated as shown or by a single 100 ohms with primary center tap taken to ground via a suitible cap. NOTE THAT THIS PART DOES NOT HAVE A TRANSMIT CHANNEL CENTER TAP ON THE CABLE SIDE. Sufficient common mode attenuation is provided by the high performance common mode chokes on chip side as well as the cable side thus making this part easy to manufacture at reduced costs. A proper system board design may allow some users to benefit from this simplified structure of the transmit channel. The phantom resistors shown around the connector have been known to suppress unwanted radiation that unused wires pick up from the immediate environment. Their placement and use are to be considered carefully before a design is finalized. It is recommended that there be a neat separation of ground planes in the layout. It is generally accepted practice to limit the plane off at least 0.05 inches away from the chip side pins of EPF8048G. There need not be any ground plane beyond this plane. For best results, PCB designer should design the outgoing traces preferably to be 50 Ω, balanced and well coupled to achieve minimum radiation from these traces. Typical Application Circuit for UTP EPF8048G E L E C T R O N I C S I N C . TEL: (818) 892-0761 FAX: (818) 894-5791 http://www.pca.com PCA ELECTRONICS, INC. 16799 SCHOENBORN ST. NORTH HILLS, CA 91343 Notes : * NIC Side is shown. Hub side connection will swap pins 3-6 with 1-2. ML6692 or ML6694 RJ45* 1 2 6 3 4 5 7 8 TX+ TX- RX+ RX- Chassis Ground 50 Ω 50 Ω EPF8048G Xmit Rcv 3 Capacitor +5V 1 2 16 15 8 7 9 10 .1 µF 14 |
|
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |