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AD9547BCPZ 데이터시트(PDF) 19 Page - Analog Devices

부품명 AD9547BCPZ
상세설명  Dual/Quad Input Network Clock Generator/Synchronizer
PDF  104 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
Logo AD - Analog Devices

AD9547BCPZ 데이터시트(HTML) 19 Page - Analog Devices

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AD9547
Rev. 0 | Page 19 of 104
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FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (PHASE NOISE):
5kHz TO 20MHz: 361fs (–69.0dBc)
20kHz TO 80MHz: 441fs (–67.3dBc) (EXTRAPOLATED)
Figure 7. Additive Phase Noise (Output Driver = LVPECL),
fREF = 19.44 MHz, fO = 155.52 MHz,
LBW = 1 kHz, fSYSCLK = 50 MHz, PLL On
–160
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FREQUENCY OFFSET (Hz)
INTEGRATED RMS JITTER (PHASE NOISE):
12kHz TO 20MHz: 245fs (–65.0dBc)
20kHz TO 80MHz: 300fs (–64.3dBc)
Figure 8. Additive Phase Noise (Output Driver = LVPECL),
fREF = 19.44 MHz, fO = 155.52 MHz,
LBW = 1 kHz, fSYSCLK = 50 MHz (Crystal), PLL On with
2× Frequency Multiplier, ICP = 375 μA, LF = External (350 kHz)
ROHDE & SCHWARZ
SMA100 (1GHz)
ROHDE & SCHWARZ
SMA100 (50MHz)
20MHz OCXO
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FREQUENCY OFFSET (Hz)
Figure 9. Phase Noise of SYSCLK Input Sources
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FREQUENCY OFFSET (Hz)
ROHDE & SCHWARZ
SMA100 (1GHz)
ROHDE & SCHWARZ
SMA100 (50MHz)
50MHz CRYSTAL
Figure 10. Additive Phase Noise Comparison of SYSCLK Input Options
(Output Driver = LVPECL),
fREF = 19.44 MHz, fO = 311.04 MHz, LBW = 1 kHz
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10M
100M
FREQUENCY OFFSET (Hz)
–160
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–90
–80
–70
INTEGRATED RMS JITTER (PHASE NOISE):
5kHz TO 20MHz: 336fs (–69.7dBc)
20kHz TO 80MHz: 425fs (–67.6dBc)
Figure 11. Additive Phase Noise (Output Driver = LVPECL),
fREF = 8 kHz, fO = 155.52 MHz,
LBW = 100 Hz, fSYSCLK = 50 MHz (Crystal), PLL On
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FREQUENCY OFFSET (Hz)
CLOSED-LOOP PEAKING: 0.04dB
Figure 12. Jitter Transfer Bandwidth, Output Driver = LVPECL,
fREF = 19.44 MHz, fO = 155.52 MHz,
LBW = 100 Hz (Phase Margin = 88°), fSYSCLK = 1 GHz, PLL Off



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