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ADL5357ACPZ-R7 데이터시트(PDF) 18 Page - Analog Devices

부품명 ADL5357ACPZ-R7
상세설명  500 MHz to 1700 MHz Balanced Mixer, LO Buffer, IF Amplifier, and RF Balun
PDF  24 Pages
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제조업체  AD [Analog Devices]
홈페이지  http://www.analog.com
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ADL5357ACPZ-R7 데이터시트(HTML) 18 Page - Analog Devices

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ADL5357
Rev. 0 | Page 18 of 24
APPLICATIONS INFORMATION
BASIC CONNECTIONS
The ADL5357 mixer is designed to downconvert radio
frequencies (RF) primarily between 500 MHz and 1700 MHz
to lower intermediate frequencies (IF) between 30 MHz and
450 MHz. Figure 52 depicts the basic connections of the mixer.
It is recommended to ac couple RF and LO input ports to prevent
non-zero dc voltages from damaging the RF balun or LO input
circuit. The RFIN capacitor value of 8 pF is recommended to
provide the optimized RF input return loss for the desired
frequency band.
IF PORT
The mixer differential IF interface requires pull-up choke inductors
to bias the open-collector outputs and to set the output match.
The shunting impedance of the choke inductors used to couple
dc current into the IF amplifier should be selected to provide
the desired output return loss.
The real part of the output impedance is approximately
200 Ω, as seen in Figure 30, which matches many commonly
used SAW filters without the need for a transformer. This results in
a voltage conversion gain that is approximately 6 dB higher than
the power conversion gain, as shown in Table 3. When a 50 Ω
output impedance is needed, use a 4:1 impedance transformer,
as shown in Figure 52.
BIAS RESISTOR SELECTION
Two external resistors, RBIAS IF and RBIAS LO, are used to adjust the
bias current of the integrated amplifiers at the IF and LO terminals.
It is necessary to have a sufficient amount of current to bias both
the internal IF and LO amplifiers to optimize dc current vs.
optimum IIP3 performance. Figure 41, Figure 43, and Figure 44
provide the reference for the bias resistor selection when lower
power consumption is considered at the expense of conversion
gain and IP3 performance.
MIXER VGS CONTROL DAC
The ADL5357 features two logic control pins, VGS0 (Pin 12) and
VGS1 (Pin 13), that allow programmability for internal gate-to-
source voltages for optimizing mixer performance over desired
frequency bands. The evaluation board defaults both VGS0 and
VGS1 to ground. Power conversion gain, IIP3, NF, and IP1dB
can be optimized, as is shown in Figure 39 and Figure 40.



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