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ADP5020ACPZ-R7 데이터시트(PDF) 18 Page - Analog Devices

부품명 ADP5020ACPZ-R7
상세설명  Power Management Unit for Imaging Modules
PDF  28 Pages
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ADP5020ACPZ-R7 데이터시트(HTML) 18 Page - Analog Devices

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ADP5020
Rev. 0 | Page 18 of
28
Activation Waveforms
tREG1
tREG2
tREG3
tXSHTDN
VUVLOR
VDDx
POR
INTERNAL
POR
EN
BUCK 1
BUCK 2
LDO
XSHTDN
I2C BUS
I2C SEQUENCER
REGISTERS
PROGRAMMING
EN_
ALL = 1
EN_
ALL = 0
POK
POK
POK
Figure 23. Regulators Are Activated by I2C Command
tREG1
tREG2
tREG3
tXSHTDN
VDDx
POR
INTERNAL
POR
EN
BUCK 1
BUCK 2
LDO
XSHTDN
I2C BUS
I2C SEQUENCER
REGISTERS
PROGRAMMING
POK
POK
POK
Figure 24. Activation Command Using the EN Pin
When activated through the EN pin, the sequencer is affected
only by the I2C commands that set or clear the regulator power
good masking bits: Bit 3 (BK1_XSHTDN), Bit 2 (BK2_XSHTDN),
and Bit 1 (LDO_XSHTDN) in the OPERATIONAL_CONTROL
register (Address 0x04). See the Default Power-On Sequence with
EN Pin section for more information. The sequence order of the
regulators is factory programmed through fuses, but the delays
between the regulators (tREG1, tREG2, and tREG3) are fixed and cannot
be changed.
The EN_ALL bit (Bit 4) in the REG_CONTROL_STATUS regi-ster
(Address 0x03) has the same functionality as the EN pin. The
sequencer has an antiglitch function that allows it to ignore supply
voltage dip if glitch time is less than 50 μs (see Figure 25).



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