SA2159

HANGZHOU SILAN MICROELECTRONICS CO.,LTD

Rev: 1.0

2005.04.22

Http: www.silan.com.cn

Page 4 of 11

Positive input currents

For positive input currents (IIN defined as flowing into pin 1), the op amp turns Q1 and D1 off, while

simultaneously turns Q3 and D3 on. Thus, the input signal current is forced to flow through Q3 and D3.

Logging & Antilogging

We know the basic properties Vbe of the transistor and the collector current Ic as:

It is assumed that D3/Q3 and Q4/D4 are matched, we therefore can conclude:

Where V3 is the voltage at the junction of D3 and D4, VT is the thermal voltage, kT/q, Ic3 is the current in the

collector of Q3, and IS is the reverse-saturation current of Q3.

In typical applications (see typical applications diagram.), pin 4 is normally at or very near ground. Pin 8 is

connected to a virtual ground. In this way, the voltage at the cathodes of D3 and D4 will cause an exponentially-

related current to flow in D4 and Q4, and out through pin 8. Mathematically:

Exponential gain control

It can be derived from said two equations:

Rearranging terms,

Where AV is the current gain, which is exponential with the difference in the voltage EC+ and EC-

For pin 4 at or very near ground, at room temperature, and converting to a base of 10 for the exponential, this

reduces to:

Av = 10 - EC- / 0.118

Another way of expressing this relationship is:

Gain = 20 log Av = - EC- / 0.0059, where the unit of Gain is dB.

+30

dB

-30

-90

-540

-360

-180

0

+180

mV

0

-60

Gain

Figure 2. Gain versus control voltage at 25

°C