| 전자부품 데이터시트 검색엔진 |
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MAAM02350 데이터시트(PDF) 2 Page - M/A-COM Technology Solutions, Inc. |
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MAAM02350 데이터시트(HTML) 2 Page - M/A-COM Technology Solutions, Inc. |
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2 / 4 page ![]() • North America Tel: 800.366.2266 / Fax: 978.366.2266 • Europe Tel: 44.1908.574.200 / Fax: 44.1908.574.300 • Asia/Pacific Tel: 81.44.844.8296 / Fax: 81.44.844.8298 Visit www.macomtech.com for additional data sheets and product information. M/A-COM Technology Solutions Inc. and its affiliates reserve the right to make changes to the product(s) or information contained herein without notice. 2 Wide Band GaAs MMIC Amplifier 0.2 - 3.0 GHz Rev. V4 MAAM02350 ADVANCED: Data Sheets contain information regarding a product M/A-COM Technology Solutions is considering for development. Performance is based on target specifications, simulated results, and/or prototype measurements. Commitment to develop is not guaranteed. PRELIMINARY: Data Sheets contain information regarding a product M/A-COM Technology Solutions has under development. Performance is based on engineering tests. Specifications are typical. Mechanical outline has been fixed. Engineering samples and/or test data may be available. Commitment to produce in volume is not guaranteed. Electrical Specifications: TA = 25°C, VDD = +6 V, Z0 = 50 Ω Parameter Test Conditions Units Min. Typ. Max. Gain 0.2 - 3.0 GHz, PIN = -30 dBm dB 17 19 — Gain Flatness 0.2 - 3.0 GHz, PIN = -30 dBm dB — ± 0.5 — Noise Figure 0.2 - 3.0 GHz dB — 3.7 4.1 Input VSWR 0.2 - 3.0 GHz, PIN = -30 dBm Ratio — 1.8:1 — Output VSWR 0.2 - 3.0 GHz, PIN = -30 dBm Ratio — 1.5:1 — Output 1 dB Compression 0.2 - 3.0 GHz dBm — +14 — Reverse Isolation 0.2 - 3.0 GHz, PIN = -30 dBm dB — 35 — Bias Current — mA — 65 100 OIP3 0.2 - 3.0 GHz, PIN = -30 dBm dBm — 24 — Handling Procedures Please observe the following precautions to avoid damage: Static Sensitivity Gallium Arsenide Integrated Circuits are sensitive to electrostatic discharge (ESD) and can be damaged by static electricity. Proper ESD control techniques should be used when handling these devices. Schematic Typical Bias Configuration 6. Self-bias operation is obtained by connecting +6 volts to both VDD and VDD’ pads, grounding pad S1, and connecting pads GND1 and GND2 to separate bypass 500 pF MOS capacitors. |
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