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PA02M/883 데이터시트(PDF) 1 Page - Cirrus Logic

부품명 PA02M/883
상세설명  Table 4 Group A Inspection
PDF  2 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

PA02M/883 데이터시트(HTML) 1 Page - Cirrus Logic

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P r o d u c t I n n o v a t i o n F r o m
PA02M
PA02MU
1
PA02M/883
BURN IN CIRCUIT
* These components are used to stabilize device due to poor
high frequency characteristics of burn in board.
** Input signals are calculated to result in internal power dissipa-
tion of approximately 2.1W at case temperature = 125°C.
SG PARAMETER
SYMBOL
TEMP. POWER
TEST CONDITIONS
MIN
MAX
UNITS
1
Quiescent current
I
Q
25°C
±15V
V
IN = 0, AV = 100, RCL = .2Ω
40
mA
1
Input offset voltage
V
OS
25°C
±15V
V
IN = 0, AV = 100
10
mV
1
Input offset voltage
V
OS
25°C
±7V
V
IN = 0, AV = 100
11.6
mV
1
Input offset voltage
V
OS
25°C
±19V
V
IN = 0, AV = 100
10.8
mV
1
Input bias current, +IN
+I
B
25°C
±15V
V
IN = 0
200
pA
1
Input bias current, –IN
–I
B
25°C
±15V
V
IN = 0
200
pA
1
Input offset current
I
OS
25°C
±15V
V
IN = 0
100
pA
3
Quiescent current
I
Q
–55°C
±15V
V
IN = 0, AV = 100, RCL = .2Ω
60
mA
3
Input offset voltage
V
OS
–55°C
±15V
V
IN = 0, AV = 100
14
mV
3
Input offset voltage
V
OS
–55°C
±7V
V
IN = 0, AV = 100
15.6
mV
3
Input offset voltage
V
OS
–55°C
±19V
V
IN = 0, AV = 100
14.8
mV
3
Input bias current, +IN
+I
B
–55°C
±15V
V
IN = 0
200
pA
3
Input bias current, –IN
–I
B
–55°C
±15V
V
IN = 0
200
pA
3
Input offset current
I
OS
–55°C
±15V
V
IN = 0
100
pA
2
Quiescent current
I
Q
125°C
±15V
V
IN = 0, AV = 100, RCL = .2Ω
60
mA
2
Input offset voltage
V
OS
125°C
±15V
V
IN = 0, AV = 100
15
mV
2
Input offset voltage
V
OS
125°C
±7V
V
IN = 0, AV = 100
16.6
mV
2
Input offset voltage
V
OS
125°C
±19V
V
IN = 0, AV = 100
15.8
mV
2
Input bias current, +IN
+I
B
125°C
±15V
V
IN = 0
30
nA
2
Input bias current, –IN
–I
B
125°C
±15V
V
IN = 0
30
nA
2
Input offset current
I
OS
125°C
±15V
V
IN = 0
10
nA
4
Output voltage, I
O = 5A
V
O
25°C
±9V
R
L = 1Ω, RCL = 0Ω
5
V
4
Output voltage, I
O = 36mA
V
O
25°C
±19V
R
L = 500Ω
18
V
4
Output voltage, I
O = 2A
V
O
25°C
±12V
R
L = 5Ω, RCL = 0Ω
10
V
4
Current limits
I
CL
25°C
±9V
R
L = 5Ω, RCL = 1Ω
.54
.86
A
4
Stability/noise
E
N
25°C
±15V
R
L = 500Ω, AV = 1, CL = 1.5nF
1
mV
4
Slew rate
SR
25°C
±18V
R
L = 500Ω
13
100
V/µs
4
Open loop gain
A
OL
25°C
±15V
R
L = 500Ω, F = 10Hz
86
dB
4
Common mode rejection
CMR
25°C
±8.25V
R
L = 500Ω, F = DC, VCM = ±2.25V
70
dB
6
Output voltage, I
O = 5A
V
O
–55°C
±9V
R
L = 1Ω, RCL = 0Ω
5
V
6
Output voltage, I
O = 36mA
V
O
–55°C
±19V
R
L = 500Ω
18
V
6
Output voltage, I
O = 2A
V
O
–55°C
±12V
R
L = 5Ω, RCL = 0Ω
10
V
6
Stability/noise
E
N
–55°C
±15V
R
L = 500Ω, AV = 1, CL = 1.5nF
1
mV
6
Slew rate
SR
–55°C
±18V
R
L = 500Ω
13
100
V/µs
6
Open loop gain
A
OL
–55°C
±15V
R
L = 500Ω, F = 10Hz
86
dB
6
Common mode rejection
CMR
–55°C
±8.25V
R
L = 500Ω, F = DC, VCM = ±2.25V
70
dB
5
Output voltage, I
O = 3A
V
O
125°C
±7V
R
L = 1Ω, RCL = 0Ω
3
V
5
Output voltage, I
O = 36mA
V
O
125°C
±19V
R
L = 500Ω
18
V
5
Output voltage, I
O = 2A
V
O
125°C
±12V
R
L = 5Ω, RCL = 0Ω
10
V
5
Stability/noise
E
N
125°C
±15V
R
L = 500Ω, AV = 1, CL = 1.5nF
1
mV
5
Slew rate
SR
125°C
±18V
R
L = 500Ω
8.5
100
V/µs
5
Open loop gain
A
OL
125°C
±15V
R
L = 500Ω, F = 10Hz
86
dB
5
Common mode rejection
CMR
125°C
±8.25V
R
L = 500Ω, F = DC, VCM = ±2.25V
70
dB
100KΩ
1Ω
1Ω
100KΩ
+15V
–15V
5
6
2
7
1
8
3,4
20Ω
* *
*
*
U.U.T
Table 4 Group A Inspection
PA02M/883
P r o d u c t I n n o v a t i o n F r o m
Copyright © Cirrus Logic, Inc. 2009
(All Rights Reserved)
http://www.cirrus.com
SEP 2009
APEX − PA02MUREVK


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