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VRE3025LS 데이터시트(PDF) 4 Page - Cirrus Logic

부품명 VRE3025LS
상세설명  Precision Voltage Reference
PDF  7 Pages
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제조업체  CIRRUS [Cirrus Logic]
홈페이지  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

VRE3025LS 데이터시트(HTML) 4 Page - Cirrus Logic

  VRE3025LS Datasheet HTML 1Page - Cirrus Logic VRE3025LS Datasheet HTML 2Page - Cirrus Logic VRE3025LS Datasheet HTML 3Page - Cirrus Logic VRE3025LS Datasheet HTML 4Page - Cirrus Logic VRE3025LS Datasheet HTML 5Page - Cirrus Logic VRE3025LS Datasheet HTML 6Page - Cirrus Logic VRE3025LS Datasheet HTML 7Page - Cirrus Logic  
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P r o d u c t I n n o v a t i o n F r o m
VRE3025
4
VRE3025DS
3. ThEORY OF OPERaTION
The following discussion refers to the block diagram in Figure 1. A FET current source is used to bias a 6.3 V zener
diode. The zener voltage is divided by the resistor network R1 and R2. This voltage is then applied to the noninvert-
ing input of the operational amplifier which amplifies the voltage to produce a 2.5 V output. The gain is determined
by the resistor networks R3 and R4: G=1 + R4/R3. The 6.3 V zener diode is used because it is the most stable
diode over time and temperature.
The current source provides a closely regulated zener current, which determines the slope of the references’ volt-
age vs. temperature function. By trimming the zener current a lower drift over temperature can be achieved. But
since the voltage vs. temperature function is nonlinear this compensation technique is not well suited for wide tem-
perature ranges.
A nonlinear compensation network of thermistors and resistors that is used in the VRE series voltage references.
This proprietary network eliminates most of the nonlinearity in the voltage vs. temperature function. By adjusting the
slope, a very stable voltage is produced over wide temperature ranges.
This network is less than 2% of the overall network resistance so it has a negligible effect on long term stability. The
proper connection of the VRE3025 series voltage references with the optional trim resistor for initial error and the
optional capacitor for noise reduction is shown below.
OUTPUT NOISE-VOLTAGE
DENSITY vs. FREQUENCY
CHANGE IN OUTPUT VOLTAGE
VS. INPUT VOLTAGE
CHANGE IN OUTPUT VOLTAGE
VS. OUTPUT CURRENT
Vin(V)
Iout(mA)
Frequency (Hz)
12 13
9
15
20
0
-20
14
16
11
10
0
-10
10
30
40
50
60
8 10
2
14
0
-200
-400
12
16
6
4
0
-300
-100
100
200
300
400
1k
10k
40
30
20
10
50
100
10
0.1Hz to 10Hz Noise
1 Sec/Div



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