MCP6241-ESLASHMS datasheet(13/38 Pages) MICROCHIP

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DS21882D-page 13

MCP6241/1R/1U/2/4

4.6

PCB Surface Leakage

In applications where low input bias current is critical,

PCB (printed circuit board) surface leakage effects

need to be considered. Surface leakage is caused by

humidity, dust or other contamination on the board.

Under low humidity conditions, a typical resistance

between nearby traces is 1012

Ω. A 5V difference would

cause 5 pA of current to flow, which is greater than the

MCP6241/1R/1U/2/4 family’s bias current at 25°C

(1 pA, typical).

The easiest way to reduce surface leakage is to use a

guard ring around sensitive pins (or traces). The guard

ring is biased at the same voltage as the sensitive pin.

An example of this type of layout is shown in

Figure 4-7.

FIGURE 4-7:

Example Guard Ring Layout

for Inverting Gain.

Non-inverting Gain and Unity-Gain Buffer:

Connect the non-inverting pin (VIN+) to the

input with a wire that does not touch the

PCB surface.

Connect the guard ring to the inverting input

pin (VIN–). This biases the guard ring to the

common mode input voltage.

Inverting Gain and Transimpedance Amplifiers

(convert current to voltage, such as photo

detectors):

Connect the guard ring to the non-inverting

input pin (VIN+). This biases the guard ring

to the same reference voltage as the op

amp (e.g., VDD/2 or ground).

Connect the inverting pin (VIN–) to the input

with a wire that does not touch the PCB

surface.

4.7

Application Circuits

4.7.1

MATCHING THE IMPEDANCE AT

THE INPUTS

To minimize the effect of offset voltage in an amplifier

circuit, the impedances at the inverting and non-

inverting inputs need to be matched. This is done by

choosing the circuit resistor values so that the total

resistance at each input is the same. Figure 4-8 shows

a summing amplifier circuit.

FIGURE 4-8:

Summing Amplifier Circuit.

To match the inputs, set all voltage sources to ground

and calculate the total resistance at the input nodes. In

this summing amplifier circuit, the resistance at the

inverting input is calculated by setting VIN1, VIN2 and

VOUT to ground. In this case, RG1, RG2 and RF are in

parallel. The total resistance at the inverting input is:

At the non-inverting input, VDD is the only voltage

source. When VDD is set to ground, both RX and RY are

in parallel. The total resistance at the non-inverting

input is:

To minimize offset voltage and increase circuit

accuracy, the resistor values need to meet the

condition:

Guard Ring

VIN-VIN+

MCP6241

VOUT

VIN2

–

VIN1

RG2

RG1

VDD

VIN –

---------

------

⎝⎠

⎛⎞

---------------------------------------------

Where:

RVIN– = total resistance at the inverting input

VIN+

------

⎝⎠

⎛⎞

-------------------------

Where:

RVIN+ = total resistance at the inverting

input

VIN+

VIN –

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