MCP6V01/2/3

DS22058C-page 42

© 2008 Microchip Technology Inc.

APPENDIX B: OFFSET RELATED

TEST SCREENS

Input offset voltage related specifications in the DC

spec table (Table 1-1) are based on bench measure-

ments (see Section 2.1 “DC Input Precision”). These

measurements are much more accurate because:

• More compact circuit

• Soldered parts on the PCB

• More time spent averaging (reduces noise)

• Better temperature control

- Reduced temperature gradients

- Greater accuracy

We use production screens to ensure the quality of our

outgoing products. These screens are set at wider lim-

its to eliminate any fliers; see Table B-1.

TABLE B-1:

OFFSET RELATED TEST SCREENS

Parameters

Sym

Min

Max Units

Conditions

Input Offset

Input Offset Voltage

-10

+10

µV

Input Offset Voltage Drift with Temperature

(linear Temp. Co.)

——

Power Supply Rejection

PSRR

115

—

dB

(Note 1)

Common Mode

Common Mode Rejection

CMRR

106

—

dB

CMRR

116

—

dB

Open-Loop Gain

DC Open-Loop Gain (large signal)

114

—

dB

122

—

dB

Note 1:

Due to thermal junctions and other errors in the production environment, these specifications are only screened in

production.

2:

3: