| 전자부품 데이터시트 검색엔진 |
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APSSO7050 데이터시트(PDF) 2 Page - auris-GmbH |
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APSSO7050 데이터시트(HTML) 2 Page - auris-GmbH |
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2 / 2 page ![]() 4.14 Oscillator SMD, spread spectrum, programmable auris-GmbH office@auris-gmbh.de www.auris-gmbh.de All specifications are subject to change without notice. Table 1 A ± 0.125% I ± 1.125% B ± 0.250% K ± 1.250% C ± 0.375% M ± 1.375% D ± 0.500% O ± 1.500% E ± 0.625% P ± 1.625% F ± 0.750% R ± 1.750% G ± 0.875% S ± 1.875% H ± 1.000% T ± 2.000% spread spread Duty cycle Output clock rise / fall Start up time % Unit Output clock switching characteristics From power on 0.2-0.8Vdd, 2.25-3.6 Vdd, Cl=30 0.2-0.8Vdd, 2.25-3.6Vdd, Cl=15 2.25V~3.6V Vdd 55 Description HCMOS @ Vdd/2 3 ns Typ Max Test conditions Min 10 ms 45 4.0 2.4 ns Electrical characteristics Input characteristics (Pin 1) VIL, Low-level input voltage TO Tri-state or power-down VIH, High-level input voltage TO Enable output or no connect IIL, Input low current IIH, Input high current Output characteristics VOL, Low-level output voltage VOHCMOS, High-level CMOS voltage Power supply current (unloaded) Input pull-up resistor Tri-state leakage current Output is tri-stated Output enable mode Output is power down 50 20 0.4 70 90 0.2 Vdd V Unit Discription Test conditions 3.0 ~ 3.6 V Vdd VIN = 0V 2.25 V ~ 3.6 V Vdd, -8 mA IOL VIN = Vdd 2.25 ~ 3.6 Vdd, OUTPUT FREQ ≤ 200 MHz 3.6V Vdd Max 0.7 Vdd 80 3.0 ~ 3.6 V Vdd Min Typ 10 µA µA V µA 3.0 V ~ 3.6 V Vdd, 8 mA IOL Vdd - 0.4 2.25 ~ 3.6V Vdd, VIN = 0.7V V V mA 35 APSSO 7050 APSSO 5032 |
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