SE97TL datasheet(21/53 Pages) NXP

21 / 53 page

SE97_6

Product data sheet

Rev. 06 — 17 August 2009

21 of 53

NXP Semiconductors

SE97

DDR memory module temp sensor with integrated SPD, 3.3 V

7.10.3.3

Sequential read

If the master acknowledges the ﬁrst data byte transmitted by the SE97, then the device

will continue transmitting as long as each data byte is acknowledged by the master

(Figure 20). If the end of memory is reached during sequential Read, the address counter

will ‘wrap around’ to the beginning of memory, and so on. Sequential Read works with

either ‘Immediate Address Read’ or ‘Selective Read’, the only difference being the starting

byte address.

Fig 19. Selective read timing

A2 A1 A0

slave address (memory)

START condition

R/W acknowledge

from slave

acknowledge

from slave

word address

SDA

002aac901

STOP condition

data from memory

no acknowledge

from master

A2 A1 A0

slave address (memory)

START condition

R/W acknowledge

from slave

Fig 20. Sequential read timing

A2 A1 A0

slave address (memory)

START condition

R/W acknowledge

from slave

acknowledge

from master

data from memory

SDA

data from memory

DATA n

+ 1

acknowledge

from master

002aab253

STOP condition

data from memory

DATA n

+ X

no acknowledge

from master

DATA n

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