 |
전자부품 데이터시트 검색엔진 |
|
|
전자부품 데이터시트 검색엔진 |
|
MPC5643L 데이터시트(PDF) 85 Page - Freescale Semiconductor, Inc |
|
|
|||||||||||||||||||||||||||||
MPC5643L 데이터시트(HTML) 85 Page - Freescale Semiconductor, Inc |
|
|
85 / 98 page  Electrical characteristics MPC5643L Microcontroller Data Sheet, Rev. 3 Preliminary—Subject to Change Without Notice Freescale Semiconductor 85 Figure 22. External interrupt timing 3.17.5 FlexCAN timing 3.17.6 DSPI timing Table 35. FlexCAN timing No. Symbol Parameter Conditions Min Max Unit 1tCANOV CTNX output valid after CLKOUT rising edge (output delay) — — 26.0 ns 2tCANSU CNRX input valid to CLKOUT rising edge (setup time) — — 9.8 ns Table 36. DSPI timing No. Symbol Parameter Conditions Min Max Unit 1tSCK D DSPI cycle time Master (MTFE = 0) 62 — ns D Slave (MTFE = 0) 62 — D Slave Receive Only Mode1 16 — 2tCSC D PCS to SCK delay — 16 — ns 3tASC D After SCK delay — 16 — ns 4tSDC D SCK duty cycle — 0.4 × tSCK 0.6 × tSCK ns 5tA D Slave access time SS active to SOUT valid — 40 ns 6tDIS D Slave SOUT disable time SS inactive to SOUT High-Z or invalid — 10 ns CLKOUT IRQ 1 2 3 |
|
링크 URL |
| ALLDATASHEET 가 귀하에 도움이 되셨나요? [ DONATE ] |
Alldatasheet는? | 광고문의 | 운영자에게 연락하기 | 개인정보취급방침 | 링크 투 데이터시트 | 링크교환 | 제조사별 검색 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Korean ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
