MPC8533EVTAAJB datasheet(35/116 Pages) FREESCALE

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MPC8533E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 3

Freescale Semiconductor

Enhanced Three-Speed Ethernet (eTSEC), MII Management

Figure 18 shows the RGMII and RTBI AC timing and multiplexing diagrams.

Figure 18. RGMII and RTBI AC Timing and Multiplexing Diagrams

8.5.5

RMII AC Timing Specifications

This section describes the RMII transmit and receive AC timing specifications.

8.5.5.1

RMII Transmit AC Timing Specifications

The RMII transmit AC timing specifications are in Table 33.

Table 33. RMII Transmit AC Timing Specifications

At recommended operating conditions with L/TVDD of 3.3 V ± 5% or 2.5 V ± 5%.

Parameter/Condition

Symbol1

Min

Typ

Max

Unit

Notes

REF_CLK clock period

tRMT

15.0

20.0

25.0

—

REF_CLK duty cycle

tRMTH

—

REF_CLK peak-to-peak jitter

tRMTJ

—

250

—

Rise time REF_CLK (20%–80%)

tRMTR

1.0

—

2.0

—

Fall time REF_CLK (80%–20%)

tRMTF

1.0

—

2.0

—

GTX_CLK

tRGT

tRGTH

tSKRGT_TX

TX_CTL

TXD[8:5]

TXD[7:4]

TXD[9]

TXERR

TXD[4]

TXEN

TXD[3:0]

(At Transmitter)

TXD[8:5][3:0]

TXD[7:4][3:0]

TX_CLK

(At PHY)

RX_CTL

RXD[8:5]

RXD[7:4]

RXD[9]

RXERR

RXD[4]

RXDV

RXD[3:0]

RX_CLK

(At PHY)

tSKRGT_RX

tSKRGT_TX

tRGTH

tRGT

GTX_CLK

(At Receiver)

RXD[8:5][3:0]

RXD[7:4][3:0]

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